A lightly doped drain (LDD) structure thin film transistor (TFT) is usually made by a self-align method which needs to repeatedly etch a gate electrode of the TFT. A first etch of the gate electrode defines a heavily doped region in a semiconductor layer. A second etch of the gate electrode defines a light doped region in the semiconductor layer. However, repeatedly etching to the gate electrode leads to a size error of the LDD structure and increase a mask times and manufacturing cost of a display panel.
Therefore, a method of manufacturing the display panel which can solve the above-mentioned problem needs to be provided.